Vectorized AES Core for High-throughput Secure Environments
Miquel Pericas (Barcelona Supercomputing Center & Technical University of Catalonia)
Ricardo Chaves (IST, INESC-ID)
Georgi N. Gaydadjiev (Technical University of Delft)
Stamatis Vassiliadis (Technical University of Delt)
Mateo Valero (Technical University of Catalonia & BSC)
Parallelism has long been used to increase the throughput of applications that process independent data. It has been used in a broad range of levels, from functional units to large parallel clusters. With the advent of multicore technology designers and programmers are increasingly forced to think in parallel. In this paper we present the evaluation of an encryption core capable of handling multiple data streams. The design is oriented towards future scenarios for internet, where throughput capacity requirements together with privacy and integrity will be critical for both personal and corporate users. To power such scenarios we present a technique that increases the efficiency of memory bandwidth utilization of cryptographic cores. We propose to feed cryptographic engines with multiple streams to better exploit the available bandwidth. Several specific cases in which such a cryptographic engine can be successfully implemented are described. We also show how multiple interfaces such as vector or hardware scheduling can be used to control such engines. To validate our claims, we have developed an AES core capable of encrypting two streams in parallel using either ECB or CBC modes. Our AES core implementation consumes trivial amount of resources when a Virtex-II Pro FPGA device is targeted.
Parallel and Distributed Computing, Computing for Data Security
Toulouse | France | 2008 | June | 24  25  26  27